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Altera_Forum's avatar
Altera_Forum
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9 years ago

Need help to provide timing constraint and understood the working of Timequest

Hello, I have used two clocks in my design.Both clocks are generated from same PLL.Clock frequency of one clock is 50MHz and frequency of other is 55MHz.I am transferring data between 50MHz and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

You want to use this construct in your .sdc file:

set_clock_groups -asynchronous -group { CLOCK_50 } -group { CLOCK_55 }

to eliminate interclock timing constraints.