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Altera_Forum
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17 years ago

Need comments on Single port RAM

I am doing a design of Single port ram in VHDL. I need inputs if there are rooms for improvement. Thanks! ---------------------------------------------------------------------------------------...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi Kaz,

Thanks for comments. One thing I do not understand is "comb for Z assignment". Could you please clarify?

I hope it is not too obvious thing to ask. :)