NDRnage Kernels Global Memory Write Pattern

Hi,

I have done some compilation on the same kernel and just played with the SIMD number (1, 2, 4, 8, 16) and watched over the resource utilization percentage. Here is the result I've got for every compilation:

16 SIMD:

+---------------------------------------------------------------------+

; Estimated Resource Usage Summary ;

+----------------------------------------+---------------------------+

; Resource + Usage ;

+----------------------------------------+---------------------------+

; Logic utilization ; 33% ;

; ALUTs ; 13% ;

; Dedicated logic registers ; 20% ;

; Memory blocks ; 12% ;

; DSP blocks ; 6% ;

+----------------------------------------+---------------------------;

8 SIMD:

+---------------------------------------------------------------------+

; Estimated Resource Usage Summary ;

+----------------------------------------+---------------------------+

; Resource + Usage ;

+----------------------------------------+---------------------------+

; Logic utilization ; 33% ;

; ALUTs ; 13% ;

; Dedicated logic registers ; 20% ;

; Memory blocks ; 12% ;

; DSP blocks ; 6% ;

+----------------------------------------+---------------------------;

4 SIMD:

+---------------------------------------------------------------------+

; Estimated Resource Usage Summary ;

+----------------------------------------+---------------------------+

; Resource + Usage ;

+----------------------------------------+---------------------------+

; Logic utilization ; 33% ;

; ALUTs ; 13% ;

; Dedicated logic registers ; 20% ;

; Memory blocks ; 12% ;

; DSP blocks ; 6% ;

+----------------------------------------+---------------------------;

2 SIMD:

+---------------------------------------------------------------------+

; Estimated Resource Usage Summary ;

+----------------------------------------+---------------------------+

; Resource + Usage ;

+----------------------------------------+---------------------------+

; Logic utilization ; 33% ;

; ALUTs ; 13% ;

; Dedicated logic registers ; 20% ;

; Memory blocks ; 12% ;

; DSP blocks ; 6% ;

+----------------------------------------+---------------------------;

1 SIMD:

+---------------------------------------------------------------------+

; Estimated Resource Usage Summary ;

+----------------------------------------+---------------------------+

; Resource + Usage ;

+----------------------------------------+---------------------------+

; Logic utilization ; 33% ;

; ALUTs ; 13% ;

; Dedicated logic registers ; 20% ;

; Memory blocks ; 12% ;

; DSP blocks ; 6% ;

+----------------------------------------+---------------------------;

I still don't see any difference in utilization. Can you please elaborate more how different size for SIMD changes the area usage? I still feel like it's not clear how things are being mapped deep in the FPGA.