Mux INOUT port in VHDL

As I wrote in my initial post, I'm feeding the INOUT pins into a vector and then down into the EDIDOutput module where I'm trying to mux one to my I2C Master. The master has dedicated input and output signals which I'm trying to combine into the selected INOUT signal by the mux code I posted. Due to the nature of I2C all members can only pull-down the bus. I accomplished this by writing either '0' or 'Z' to SDA. But the problem is, that I don't understand why Quartus does not let me read SDA. The reading of SDA generates the error messages I posted.