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Altera_Forum
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14 years ago

Mux INOUT port in VHDL

Hi all! Currently I'm trying to connect my I2C master module to one of four I2C slaves using a mux without success: I can't get the bidirectional SDA signal to correctly mux. The code is as foll...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

the brick: thanks for this clarification. I used to_x01 to solve problems when comparing states in the module reading SDA. If I just read 'H' on the line, a compare with '1' fails. According to my techbench I'm also reading 'H's into my internal sift register. I need to compare that later with a preassigned address (a std_logic_vector containing '0' and '1') which also always fails. Whats your suggested method to solve that?