Multiply-by-2 clock

Thanks for the help rbugalho. I used create_clock constraint to generate both the clocks.

However, one strange thing that I noticed is that the tool is reporting the Fmax of the external clock as approximately twice that of internal clock! It should have been the other way round.

In the .sdc file my base_clock = 8ns => 125 MHz, internal_clock = 4ns => 250 MHz. But the Fmax for the base_clock = 625 MHz and Fmax for internal_clock = 303 MHz. Even though the multiplied by 2 factor is still maintained between the 2 clocks, I am not able to understand why the relationship is flipped!

Is it because of the fact that since the internal_clock is not generated by the base_clock and since they are independent of each other Quartus calculates the Fmax for each clock separately?