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Honored Contributor
Honored ContributorMultiple constant driver error
[h=1]This is the verilog code i have written in quartus 2 .... Bt after compilation i m getting "Can't resolve multiple constant drivers for net" such errors.... i guess it is something related to th...
Altera_ForumHonored Contributor
Honored Contributoryou have created 256 always blocks, all driving s0, s1, s2 and s3 to 1'b1, hence the multiple constant drivers.
Get rid of the generate. Btw, your circuit does nothing except drive all outputs to '1b1 forever.
