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Altera_Forum's avatar
Altera_Forum
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16 years ago

MSim/QII: Viewing m4K blocks in simulation.

In the "Memories" pane of Modelsim, it lists the M4K memory- a dual port in my case, in bit wide "stripes" versus as one contiguous 2K deep/8bit wide memory. The problem is when I simulate and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Yeh, what strange is with Xilinx ISE it automaticallt takes it's generated memory block similar to what MegaWiz creates and puts that entire memory instance as a single block, then when you go to view it in waveforms, you see location zero up to the end in 8 bit values which you can assign as say a Hex value so it is very easy and quick to see the memory contents.

thx