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mappy5's avatar
mappy5
Icon for New Contributor rankNew Contributor
4 years ago

Module removal by compilation optimization

I want to synthesize soft CPU IP by itself and evaluate resources. I created a TOP wrapper to implement a CPU module. However, when I look at the compilation result, I can't find the CPU module I ...
mappy5's avatar
mappy5
Icon for New Contributor rankNew Contributor
4 years ago

Hi

There are 3147400 deleted registers.

Do I need to add a pragma to Verilog for everything?

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

Is your design or this soft CPU you mention (Nios?) not connected to any I/O? That is a lot getting optimized away. What does the report mentioned indicate?

If you're not connected to I/O pins, add Virtual Pin assignments in the Assignments Editor to prevent unconnected logic from getting optimized away.