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Altera_Forum's avatar
Altera_Forum
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14 years ago

modlesim 6.6d

i am new to modlesim, i downloaded the latest version, i hope if someone tells me how to simulate vhdl program with modlesim in simple way

19 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    I suggest you ask more specific questions. You can write the testbench in quartus but you cannot compile it in there.

  • Altera_Forum's avatar
    Altera_Forum
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    i think there is a way where we can force some inputs and see the outputs in modlesim

  • Altera_Forum's avatar
    Altera_Forum
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    No there is not.

    The old quartus simulator allowed that, but that is not included in Quartus 10+
  • Altera_Forum's avatar
    Altera_Forum
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    i can see it in modlesim after selecting new source , but do i need to write all the possible inputs

  • Altera_Forum's avatar
    Altera_Forum
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    I suggest you focus your questions more clearly - it is not very clear what you are talking about.

  • Altera_Forum's avatar
    Altera_Forum
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    my question is, as i have VHDL codes that are working fine and i simulated then in quartus ii, and i used the waveform file in quartus , it works fine

    i want to use modlesim to simulate the same vhdl code(program), so as i did in quartus i selected some values to the inputs and observed the output response..

    is there a way i do the same in modlesim, putting some input values and see the outputs,
  • Altera_Forum's avatar
    Altera_Forum
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    Like I said, the old quartus simulator supports what you are trying to do. You may be able to export this as a file Modelsim can understand, but usually you create another VHDL file as the testbench for modelsim.

    If you think they are working fine using the quartus simulator, why do you want to use modelsim?
  • Altera_Forum's avatar
    Altera_Forum
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    i want to work with modlesim, and try it,,, do u know to create this test bench for modlesim, is there automatic way