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SSFyTMT's avatar
SSFyTMT
Icon for New Contributor rankNew Contributor
7 years ago

Modifying the a10_ref OpenCL BSP Error

I'm trying to modify the a10_ref OpenCL BSP, specifically the a10gx_hostch board in 17.1. I'm trying to add IO channels for a 10GigE interface. I'm getting errors during the import compile I can't ...
Nooraini_Y_Intel's avatar
Nooraini_Y_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi @SSFyTMT​ ,

Thank you for status update and its good to know you are able to resolve the issue. Appreciate the feedback, we will take note on this to channel the input accordingly. Please don't hesitate to post questions(wrt Intel FPGA) and continue to feedback as your input does help us improve or provide a better service within this forum. Hopefully you will experience a better support with us. Thank you.

Regards,

Nooraini