I am wondering about the RPSS custom IP. When it is getting instantiated, I don't see Quartus instantiating with the HDL parameters. Even though it detected the parameters in the create component analysis stage and has all the parameters properly listed in rpss_hw.tcl. So I am wondering if there are any other settings that I am missing for the parameters of the custom IP that need to be set for the detection of parameters correctly by Quartus/Platform Designer.
Instantiation of RPSS does not have parameters
rp_ss rpss_0 (
.hip_clk (clock_in_out_clk_clk), // input, width = 1, hip_clock_in.clk
.sys_clk (clock_in_out_clk_clk), // input, width = 1, sys_clk_in.clk
.slow_clk (clock_in_out_clk_clk), // input, width = 1, slow_clk_in.clk
.ip_rst_n (reset_in_out_reset_reset), // input, width = 1, ip_rst_n.reset_n
.sys_rstn (reset_in_out_reset_reset), // input, width = 1, sys_rstn.reset_n
.reset_status (rtile_dummy_0_r_tile_reset_status_n_reset), // input, width = 1, R_Tile_reset_status_n.reset_n
.slow_reset_status (rtile_dummy_0_r_tile_slow_reset_status_n_reset),
whereas some existing Intel IPs are instantiated with parameters
altera_reset_controller #(
.NUM_RESET_INPUTS (1),
.OUTPUT_RESET_SYNC_EDGES ("both"),
.SYNC_DEPTH (2),
.RESET_REQUEST_PRESENT (0),
.RESET_REQ_WAIT_TIME (1),
.MIN_RST_ASSERTION_TIME (3),
.RESET_REQ_EARLY_DSRT_TIME (1),
.USE_RESET_REQUEST_IN0 (0),
.USE_RESET_REQUEST_IN1 (0),
.USE_RESET_REQUEST_IN2 (0),
in rpss_hw.tcl
add_parameter QUEUE_MEM_BASE_ADDRESS STRING "64'h0001_0000_0000_0000"
set_parameter_property QUEUE_MEM_BASE_ADDRESS DEFAULT_VALUE "64'h0001_0000_0000_0000"
set_parameter_property QUEUE_MEM_BASE_ADDRESS DISPLAY_NAME QUEUE_MEM_BASE_ADDRESS
set_parameter_property QUEUE_MEM_BASE_ADDRESS UNITS None
set_parameter_property QUEUE_MEM_BASE_ADDRESS AFFECTS_GENERATION false
set_parameter_property QUEUE_MEM_BASE_ADDRESS HDL_PARAMETER true
set_parameter_property QUEUE_MEM_BASE_ADDRESS TRANSFORM_PARAMETER false
set_parameter_property QUEUE_MEM_BASE_ADDRESS EXPORT true
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