Modification programme pour EPLD EPM7128SLC84 Code réalisé avec Quartus 9.0 Osp2 Web Edition (Windows XP)

Hi,

Here, for compiling & programming(MAX 7000) the EPLD EPM7128SLC84 you can install any Quartus version from 10.1 to 13.0 Web Edition as shown below,

please refer the links below,

https://www.intel.com/content/www/us/en/programmable/downloads/download-center.html

https://www.intel.com/content/www/us/en/programmable/downloads/software/service-packs/sps-web.html#90

Regards,

Vicky

Hi,

There is no code attached here, but you can identify the language with file extension like below,

VHDL: .vhd

Verilog: .v

System verilog: .sv

Other programming languages like .c & .cpp etc.

Regards,

Vicky

Hi,

As mentioned in previous post, please identify your language with file extension if you have downloaded it from somewhere otherwise without code it is difficult to support. I request you, please provide screenshot, word file of screenshots or project file(Project menu-> Archive project) *.qar.

Regards,

Vicky

Hi,

My code

Regards

From the .qsf file in the .zip file: set_global_assignment -name AHDL_FILE surveillance.tdf

So the input source file is written in AHDL.

Is this even supported in any recent version of Quartus? The OP it appears is using MaxPlusII v9.0

Hi,

Yes, It`s written in AHDL & AHDL still supported in latest versions of Intel Quartus tool.

please refer the links below for more details,

https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/reference/glossary/def_tdf.htm

https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/reference/glossary/def_inc.htm

Now I would like to suggest, please open new thread for any query for better support & tracking.

Regards,

Vicky

Ok, but the last version of Quartus that supports the EPM7128S series parts is 13.0sp1