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Elit's avatar
Elit
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Modelsim Intel FPGA Edition 2020.3 Pro and 2020.1 Standard license problem

Hi I'm trying to run the Verilog HDL Testbench for a Single /Two Avalon-MM Master and Slave Pair. With Modelsim Intel FPGA Edition 2019.4 Pro everything is good, but with 2020.3 Pro and 2020.1 St...
AR_A_Intel's avatar
AR_A_Intel
Icon for Super Contributor rankSuper Contributor
5 years ago

Hi

We update you in private message


  • Elit's avatar
    Elit
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Hi.

    Thanks for the support.

    1) Debug.log file not created.

    3) Error messages screenshot attached.

    5) Machine OS information:

    6) A problem with Quartus Prime Pro 20.3 + Modelsim Intel FPGA edition Pro 2020.3.

    Everything is fine with Quartus Prime Pro 19.4 + Modelsim Intel FPGA edition Pro 2019.4.

    Thanks

    Elit.