Modelsim, Instantiation of 'dffeas' failed. The design unit was not found.

Anand, the fastest way is to include the dffeas.v file in the compilation command line of my testbench.v

vlog -work work testbench_VIDOR4000/testbench.v C:/intelFPGA_lite/18.1/quartus/eda/fv_lib/verilog/dffeas.v

But, I should do that for all future "not found" modules, so the way proposed by Abe (provided the additional libraries

contain all existing modules) seems to me better and it works.

Thanks both!

Fabio