Modelsim, Instantiation of 'dffeas' failed. The design unit was not found.

Hi,

Try to compile the dffeas library.

You can find the file in directory C:\intelFPGA_lite\18.1\quartus\eda\fv_lib\verilog\dffeas.v

Steps

1. vlib cyclone10lp_ver
2. vmap cyclone10lp_ver cyclone10lp_ver
3. vlog -work cyclone10lp_ver C:/intelFPGA_lite/18.1/quartus/eda/fv_lib/verilog/dffeas.v

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Regards

Anand