Modelsim-Altera errors

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Thanks for your reply, I do have timing violations it seems. Are these types of error messages a normal indication of timing violations?

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Hi,

yes, in a simulator you will get such or similar messages for timing violations.

# ** Error: C:/altera/91/modelsim_ase/win32aloem/../altera/verilog/src/stratixii_atoms.v(1655): $hold( posedge clk &&& nosloadsclr:3614784 ps, datain:3614950 ps, 200 ps );

This messages indicates that you have a holdtime violation.

Your Clock edge occurs at simulation time 3614784 ps

Your data changed at 3614950 ps, that is 166ps behind the clockedge. Require are 200ps.

You have a time violation of 34ps.

Is this a path in your design ?

Kind regards

GPK