Modelsim-Altera do file paths

These are the Modelsim errors :

vcom -93 -work work {C:/intelFPGA_lite/18.1/quartus/qdesigns/top_pas_rs_hssl_mk2/hdl/lib_top_pas_rs_hssl_mk2_fw/hssl_mk2_hbi_interface.vhd}
# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016
# Start time: 13:27:30 on May 31,2022
# vcom -reportprogress 300 -93 -work work C:/intelFPGA_lite/18.1/quartus/qdesigns/top_pas_rs_hssl_mk2/hdl/lib_top_pas_rs_hssl_mk2_fw/hssl_mk2_hbi_interface.vhd
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Loading package NUMERIC_STD
# ** Error: C:/intelFPGA_lite/18.1/quartus/qdesigns/top_pas_rs_hssl_mk2/hdl/lib_top_pas_rs_hssl_mk2_fw/hssl_mk2_hbi_interface.vhd(45): (vcom-1598) Library "lib_top_pas_rs_hssl_mk2_fw" not found.
# ** Error: C:/intelFPGA_lite/18.1/quartus/qdesigns/top_pas_rs_hssl_mk2/hdl/lib_top_pas_rs_hssl_mk2_fw/hssl_mk2_hbi_interface.vhd(46): (vcom-1136) Unknown identifier "lib_top_pas_rs_hssl_mk2_fw".
# ** Error: C:/intelFPGA_lite/18.1/quartus/qdesigns/top_pas_rs_hssl_mk2/hdl/lib_top_pas_rs_hssl_mk2_fw/hssl_mk2_hbi_interface.vhd(48): VHDL Compiler exiting
# End time: 13:27:30 on May 31,2022, Elapsed time: 0:00:00
# Errors: 3, Warnings: 0
# ** Error: C:/intelFPGA_lite/18.1/modelsim_ase/win32aloem/vcom failed.
# Error in macro ./top_pas_rs_hssl_mk2_fw_run_msim_rtl_vhdl.do line 14
# C:/intelFPGA_lite/18.1/modelsim_ase/win32aloem/vcom failed.
# while executing
# "vcom -93 -work work {C:/intelFPGA_lite/18.1/quartus/qdesigns/top_pas_rs_hssl_mk2/hdl/lib_top_pa