Modelsim & VHDL Configuration

Hi,

The issue maybe due to the fact that you have earlier compiled and simulated the design using the vopt switch. You could try by recompiling the design and then simulating using it without using the vopt argument. This happens because the earlier compilations and simulations would have produced an optimized simulation database, and when you try and simulate the same deign(database) without the optimization the tool will throw errors.

All you need to do is to recompile the entire design and simulate it again without using the optimization (vopt).