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Altera_Forum's avatar
Altera_Forum
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12 years ago

Modelsim + Cyclone V PLL = Error occurred in protected context

Hello Guys,

I am currently trying to simulate one of my designs with Modelsim SE 10.0b for a Cyclone V FPGA. I have been doing many designs in the past with Altera and I never had any issues until now.

When I try to perform a simulation of a design that contains a Cyclone V PLL, I get the following error message in Modelsim transcript:

# Loading sv_std.std# ** Fatal: Error occurred in protected context.# Time: 0 ps Iteration: 0 Protected: /ds_tof_gen_cycv_tb/DUT/MIXLEDGEN/MIXLED_PLL/ds_mixled_pll_cycv_altera_pll_altera_pll_i_304/genblk2/genblk1/lcell_cntsel_int_4/genblk1 File: nofile# FATAL ERROR while loading design# Error loading design

Here are some more details about what I did:

  • My design is coded in VHDL

  • I generated the Altera Modelsim libraries with the Quartus II 13.0 Simualtion Library Compiler

  • When creating a PLL for Cyclone V, Quartus generates a verilog file for compilation and a *.vho file for simulation. I only included the *.vho file in my modelsim project.

  • I even tried to use the TCL script generated by the megaplugin wizard msim_setup.tcl and it does not help

  • The PLL has 3 outputs and does not use dynamic phase shifting or dynamic reconfiguration

I used the following command to run try and run the simulation:

vsim -t ps -novopt -L cyclonev work.ds_tof_gen_cycv_tb

If I run this command without the argument "-L cyclonev" I get the same error message but with unknown protected contexts (see below)# ** Fatal: Error occurred in protected context.# Time: 0 ps Iteration: 0 Protected: /ds_tof_gen_cycv_tb/DUT/MIXLEDGEN/MIXLED_PLL/ds_mixled_pll_cycv_altera_pll_altera_pll_i_304/<protected>/<protected>/<protected> File: nofile# FATAL ERROR while loading design# Error loading design

I even tried to use Modelsim Altera 10.1d and it gives the same error message. I am completely blocked at the moment. It is very strange as I guess that some people already tried to simulate a cyclone V PLL before.

Could someone help me with this problem?

Thanks a lot to all,

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hello Guys,

    I received an answer from the Altera Service Request and they say that this is a known issue that will be fixed in Altera Quartus 14.0. But in the meanwhile it is possible to go around the problem by commenting the following two lines in the file /eda/sim_lib/altera_lnsim.sv:

    //defparam lcell_inst.lut_mask = lut_mask;

    //defparam lcell_inst.dont_touch = dont_touch;

    After doing this, the error is gone indeed. But I know get some issues when using the ALTPLL_RECONFIG of the PLL. It does not seem to respond correctly as I can never manage to reconfigure any of the PLL outputs. I don't know what the problem is but I get a lot of warning messages. See the report file in attachment.

    If someone can help me on this, it would be great!

    Thanks to all,
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    It seems that cyclone V VHDL library has some problem. You can get through the issue with using verilog library instead, but PLL reconfiguration model looks to assume VHDL library. Can you try as follows?

    (1) compile both VHDL and Verilog library

    vlog %QDIR%\eda\sim_lib\cyclonev_atoms.v -work cyclonev_ver

    vcom %QDIR%\eda\sim_lib\cyclonev_atoms.vhd -work cyclonev

    vcom %QDIR%\eda\sim_lib\cyclonev_components.vhd -work cyclonev

    (2) refer both VHDL and Verilog library in vsim

    vsim -do "do wave.do;run -all" -novopt -t ps -L work -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -l cyclonev_ver -l cyclonev work.tb

    ** You should refer "cyclonev_ver" before "cyclone"