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Altera_Forum
Honored Contributor
12 years agoMixing OpenCL kernel with VHDL Netlists
Hi, Is it possible for the output of an OpenCL kernel to reside in the same FPGA as a VHDL netlist? For example, could I implement an algorithm in OpenCL and a display driver in VHDL? The intentio...
Altera_Forum
Honored Contributor
11 years agoHello BadOmen,
I can't send private message, but could you please send the customized Nallatech BSP for my reference? my email : [email protected] thanks in advance. regards, Farabi