Mixing OpenCL kernel with VHDL Netlists

Looks like you just hit the minimum of 10 posts.

You are correct in your assessment. Also my previous post assumed you wanted the OpenCL kernel to have access to the custom RTL that you add to the board support package. If they are completely indepenent then you can ignore what I said about connecting them via channels.

If your FPGA is connected over PCIe for example then the driver would need to be capable of being accessed not only by the OpenCL runtime but also whatever else is running on the host. What you can sometimes do is use the OpenCL framework to move the data back and forth to the FPGA and just have a simple kernel that moves data between streaming and memory mapped domains. For example I could see updating a video frame being as simple as having a dedicated frame buffer sitting in the FPGA, and having a kernel that has the sole purpose of populating that frame buffer and telling your VGA controller where to find it. That way you don't have to modify the driver because you are relying on the OpenCL framework to handle all communication across the link.