missing .sdc file...

Read this too:

http://www.alterawiki.com/wiki/file:timequest_user_guide.pdf

- Clock period is 1/frequency. So for a 20 MHz clock, it's 20 ns.

- In general, both input and output delays are a range, so you should use -min and -max. But if your -min and -max values are the same, then you can just use one command like in that example.

- Yes, you should also constrain the SPI clock.

- Since the SPI signals are related to the SPI clock, you should constrain then to the SPI clock.

However, I'm guessing, your main clock and your SPI clock are unrelated. Ie, you have no way to know their relative phases.

This means that you need to use asynchronous clock domain crossing techniques whenever you move from one clock to the other.

You should also add a "set_false_path -from [get_clocks clk] -to [get_clocks spi_clk]" so that TQ doesn't try to analyze those paths (which can't be analyzed).