Minimum Pulse Width violation

Are you sure TimeQuest is doing this? I'm pretty sure:

1) The dynamic delay chains all power-up to the shortest delay when the dynamic inputs are used

2) TimeQuest analyzes it this way.

I just analyzed an I/O with dynamic delay chains(SIV output) and saw this occuring.

Also, Minimum Pulse Width checks are usually against a single point, i.e.:

- An I/O port that is clocked faster than the standard on it

- A memory block running faster than the max rates in the handbook

- The PLL reconfig clock going faster than it should

Perhaps you're running the I/O config clock faster than allowed?