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SivaKona's avatar
SivaKona
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

MemWr access failing Quartus Generated PCIe EP on Stratix10MX

Hi Syafieq, We are trying to bring up below design(shown in attached FPGA_noHBM_model.png) on a Stratix10 MX platform. Quartus Version Quartus Prime Version 21.2.0.72 PCI...
SivaKona's avatar
SivaKona
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hi,

I got to know that there is a known issue with PCIe End Point as described below

"During End Point Enumeration , some Read requests propagate into AVMM Interconnect and hang the interconnect"

Is this issue really True? If Yes , What is the work around ?

Regards

Siva Kona