Forum Discussion
Altera_Forum
Honored Contributor
15 years agoOk, I realized that shifting the clock too much obviously violated the hold-relationship so I had to relax it a bit from the 90 degree shift.
I got it to work by shifting for example -25 degrees and adding a multicycle of 2 between the PLL input clk and output pin clk so TQ does not consider the first edge after the shift to be the latch edge. I guess this is the Right Way to do this after all? /Bjorn