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m_kumar's avatar
m_kumar
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Maximum Input Clock for FIFO

Hi Iam using max10 fpga , having dought regarding to fifo memory block, what is the maximum input clock can be given to fifo ip. In my project iam using fifo dual clock mode. write clock = 2...
Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,

Hope you have got answer to what you are looking for. Is it ok to close this case?


Regards.


  • m_kumar's avatar
    m_kumar
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago

    Hi ,

    I have changed my design and reduced input clock to 80Mhz, now i am moving with the project. Anyway thanks for the information.

    Regards

    Manoj