Forum Discussion
m_kumar
Occasional Contributor
5 years agoMaximum Input Clock for FIFO
Hi
Iam using max10 fpga , having dought regarding to fifo memory block, what is the maximum input clock can be given to fifo ip.
In my project iam using fifo dual clock mode.
write clock = 2...
Ash_R_Altera
Regular Contributor
5 years agoHi,
Hope you have got answer to what you are looking for. Is it ok to close this case?
Regards.
- m_kumar5 years ago
Occasional Contributor
Hi ,
I have changed my design and reduced input clock to 80Mhz, now i am moving with the project. Anyway thanks for the information.
Regards
Manoj