MAX10 set_false_path failure

Hi, Thank you for the helpful reply.

You pointed out a subtle but significant detail that wasn't apparent from the descriptions of set_false_path usage. Whereas the description states the '-from' must be a clock pin, it does not distinguish that pin must be at a register or node as you pointed out. Per your suggestion, I took a look at the set_clock_groups constraint.

I also found the following page to be really helpful as far as all timing constraint usage : https://www.intel.com/content/www/us/en/programmable/documentation/ony1529966370740.html?wapkw=difference%20create_clock%20create_generated_clock#mwh1410383723620

Following the examples at the above link, it appears that set_clock_groups constraint works; timing was met, with no warnings issued in regards that constraint, and Timing Analyzer - Ignored Constraints was empty.

I have one other CDC issue involving the incoming (from the board) RESET signal. The difference here (from the previous CDC case) is the signal originates from an input pin with no associated clock, and it's de-assert is completely random. Similar to the previous CDC, the following attributes were used in the vhd file and rejected (warning issued) by the tools :

ATTRIBUTE altera_attribute OF ff1_80 : signal is "-name SYNCHRONIZER_IDENTIFICATION ""FORCED IF ASYNCHRONOUS""";

ATTRIBUTE altera_attribute OF CDC_Behav : architecture is "-name SDC_STATEMENT ""set_false_path -to *|RESET_SYNC:*|ff1_80 """;

Based on your previous post, I chose to replace this with a set_false_path constraint from the "RESET~input|i pin" input (-from), to the first register of the CDC module (ff1). Again the Timing Analyzer shows no ignored constraints so I assume this constraint is correct:

set_false_path -from [get_pins {RESET_N~input|i}] -to [get_registers {RESET_SYNC:inst6|ff1_UC}]

Is this the best approach for handling an incoming asynchronous reset in the MAX10 part? (the goal in this case is to make sure the de-assert of the incoming reset is glitch-free into the receiving clock domain).

Thank you again for your time and help.