Forum Discussion
Occasional ContributorMax 10 GPIO lite ip
Hi
in my project using max10 fpga i configued as a GPIO lite ip as an ddr input path, and quartus software automatically add that ip into project, now i need to edit the ip parameters, Problem is when i tried to open the ip it was showing path not available.
Hello,
No need. I think the problem you are facing is the missing file in your Quartus. Please try this workaround from this link: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/component/2018/failed-to-launch-megawizard-plug-in-manager--pll-intel-fpga-ip-v.html
That's the solution for PLL but you can do the same in your case.
Thanks
6 Replies
AminT_IntelRegular Contributor
Hello Kumar,
I am sorry you are facing this issue. May I get your version of Quartus and your device OPN?
Thank you
m_kumarHi
My Quartus version is 20.1 and it is lite edition and MAX10 FPGA.
Thanks.
- AminT_Intel
Hello,
Would you be able to share your sample design file?
Thanks
