--- Quote Start ---
Anyway, what may be the reason to the warning messages...?
--- Quote End ---
LCELL buffers can be used to stop the tool optimising logic cells away. That is unlike registers, the tool may otherwise remove logic using equivalent circuit. With registers it respects your code except things like duplication or removing duplicate registers or packing or retiming.
keeping your logic or not should not alter functionality though it changes delay but you are supposed to have a synchronous design that is tolerant to delay variations within timing limits of your design.
So in short it looks like your tool synthesis stage decides to insert LCELL buffers but fitter rejected that.
Honored Contributor
