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Altera_Forum's avatar
Altera_Forum
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12 years ago

Mapping more out ports to one out port

I have a ram memory that consists of several memory units. Each memory unit has, among other ports, data_out port. Memory itself has data_out port and it passes data that comes from one of those mem...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I made multiplexer and encoder. The output of encoder is the input of multiplexer, so it can decide which memory unit data to pass. But, I made those two as asynchronous entities... Is that wrong considering that memory should respond after exact number of clk periods? I don't quite understand when does signal gets it's next value...