Managing One Design with Multiple FPGA Output Binaries

Thank you for responding. I’ve used the Quartus GUI for 99% of everything up until now, so this is all new to me.

To start with, I made a really simple test project with two source files: fpga_tester and fpga_tester2. I put the shared design constraints into a file called common.tcl. I then made a top level Tcl script (test.tcl) like this:

load_package flow
load_package project
# First build
project_new script_temp -revision first -overwrite
source common.tcl
set_global_assignment -name SYSTEMVERILOG_FILE fpga_tester.sv
set_global_assignment -name TOP_LEVEL_ENTITY fpga_tester
execute_flow -compile
project_close
# Second Build
project_new script_temp -revision second -overwrite
source common.tcl
set_global_assignment -name SYSTEMVERILOG_FILE fpga_tester2.sv
set_global_assignment -name TOP_LEVEL_ENTITY fpga_tester2
execute_flow -compile
project_close

Running “quartus_sh –t test.tcl” from the Windows command line worked as far as making two different output binaries, but it was a mess trying to sort through the build messages and warnings. I then tried running the test.tcl script from inside the Quartus GUI, but it just gave me this error:

source "C:/Users/Owner/Desktop/fpga_tester/test.tcl"
Error:ERROR: Tcl package "::quartus::project" does not exist. Specify an available Quartus II Tcl package. Type "help" for a list of available Quartus II Tcl packages.
Error:    while executing
Error:"load_package project"
Error:    (file "C:/Users/Owner/Desktop/fpga_tester/test.tcl" line 2)
Error:    invoked from within
Error:"_source C:/Users/Owner/Desktop/fpga_tester/test.tcl"
Error:    ("uplevel" body line 1)
Error:    invoked from within
Error:"uplevel 1 $cmd "
Error:    (procedure "source" line 5)
Error:    invoked from within
Error:"source "C:/Users/Owner/Desktop/fpga_tester/test.tcl""

Are scripts that work with quartus_sh not compatible with the GUI? I tried typing "help" as suggested, but that just causes Quartus to crash and dump a stack trace on my system.