Making a process

Using VHDL-2008 it becomes even more simple and elegant:

process(all)
begin
   if not(A) or not(B) or not(C) then
      F <= '0';
   elsif .. . 

I have found that VHDL 2008 makes code more readable in this way.

Best, James

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method 1(brute force):

process(A,B,C)

begin

if A = '0' and B = '0' and C = '0' then

F <= '0';

elsif...

....

end if;

end process;

method2:

process(A,B,C)

begin

F <= A or B or C;

if (A = '1' and B = '0' and C = '1') or (A = '1' and B = '1' and C = '0') then

F <= '0';

end if;

end process;

and so on...

end process;

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