LVDS transmitter alignment

Thank you gambit,

I also thought that 16 bits was invalid but if I enable the option "Implement serializer/deserializer circuitry in logic cells ", I can have more than 10 bits. I have checked it and it works expecting the problem with the clock that it is still there even if I use only 10 bits.

So, if I understood correctly, you are telling me that I need to use the output clock of the transmitter in the receiver. The problem is that both devices are in different boards and I only have one bit to send information from the transmitter to the receiver so I can only send the signal, not a clock. But I have a common clock in both boards that I thought I could use to synchronize the data.

Sorry if I am not able to explain very well the problem but I am a beginner in quartus.