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Altera_Forum
Honored Contributor
11 years agoLVDS_DIRECT_LOOPBACK_MODE - need more detail on what "adjacent pair" means
I am looking into using the setting LVDS_DIRECT_LOOPBACK_MODE for a current design project but I am confused by this sentence in the description: "When this feature is enabled, data coming in from t...
Altera_Forum
Honored Contributor
11 years agoNevermind. Looks like this does not apply to Cyclone devices (from ON-LINE MANUAL):
A logic option that enables the LVDS direct loopback mode on a true differential output pin. You must assign this option from an input pin to an output pin and you should assign both pins true differential I/O standards. When this option is turned on, data coming in from the adjacent RX pin pair gets looped back to the TX pin pair. This option is useful for verifying the TX and RX buffers by checking the data transmitted and received. This option is ignored if it is applied to anything other than a pin or a top-level design entity. This option is available only for Stratix V devices.