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Altera_Forum's avatar
Altera_Forum
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16 years ago

Looking for guidance re large team designs

I am looking for guidance from folks with experience developing and/or managing code for large FPGAs. Our project is moving from three Stratix FPGAs to one Stratix III FPGA. In the origi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

While we are presently using bottom up design, the reasons I would prefer not:

1) QII can not optimize across partition boundaries

2) More work especially if SDC files are needed for partion boundaries

3) I don't know how to probe inside a partition with signal tap. I gather it can be done but am not sure.