Honored Contributor
Honored ContributorLogicLock physically places it in the device based on the rectangle(or other shape) you create. Partitions have the hierarchy synthesized independently of other logic(although it is fit with the rest of the design as if they were flat, at least on the first pass). You then have the option to re-use the previous synthesis of that hierarchy or synthesis and fit information on your next compile. The Quartus II handbook should talk about it quite a bit.
http://www.altera.com/literature/hb/qts/qts_qii51017.pdf I also put together the following: http://www.alterawiki.com/wiki/tips_for_incremental_compilation_and_logiclock
