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EGrub's avatar
EGrub
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

LogicLock Arria10 issues with Platform Designer projects

I'm having a big Platform Designer project with Quartus Prime 18.1 (there is a good reason why I use this version but should not be the topic of this issue) With an Arria10 the Platform Designer ge...
EGrub's avatar
EGrub
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Hi Richard!

Solution 2 seems to work: "*|*:calibration|*:adc|*"

And I tried something similar than "*|*:calibration|*:dac|output[*]" and that worked as well!

May it be that if one of the logic locks fails due to an error the others are failing as well?

I changed the first few logic locks for testing reason and the warnings of the other logic locks vanished as well?!

BR

Erich

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi @EGrub

I am glad that the solution works for you. Unfortunately, the thread has been transition to the community support due to long idle time since my last reply. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.