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EGrub's avatar
EGrub
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

LogicLock Arria10 issues with Platform Designer projects

I'm having a big Platform Designer project with Quartus Prime 18.1 (there is a good reason why I use this version but should not be the topic of this issue) With an Arria10 the Platform Designer ge...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

You shouldn't need to use Logic Lock regions if you have timing constraints set up correctly. Where are you seeing an issue (timing report?) that prompted you to add LL regions like this?

And is that an off-the-shelf IP or your own custom IP? I don't recall a hard (or soft) ADC off-the-shelf in A10.