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Jamil's avatar
Jamil
Icon for New Contributor rankNew Contributor
5 years ago

Logic Analyzer Interface (LAI) using QUARTUS PRIME PRO 20.4

Hi FPGA community, I am trying to add a very simple logic analyzer interface (LAI) to my design. Once I did this, then I restarted the compilation. But The compilation does not go through. Nor...
Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Could it be that your design is using up too much resources? Can you check the Resources Summary in the Analysis & Synthesis report?


Regards,

Nurina


  • Jamil's avatar
    Jamil
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi Nurina,

    Yes of course I checked the logic utilizations. About 40% of logic uti (LABs) have been used and about 8% of the memory ressources.

    I just added a small LAI to the design (6 banks x 4 signals).

    Best Regards

    Jamil