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I think it is safe to say it is a Quartus bug, but wouldn't bother to file an SR as the Altera gang will tell us to work-around it the way Kaz proposes. Which is not a problem to me, I never initialize a variable at the declaration, not even in C or C++ programs. I always initialise a variable just prior to the first use, to my idea it better documents what's going on.
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I would still file a SR so at least it's there for them to consider. But I also dont think they'll bother fixing it. Ive had several other VHDL SRs relating to imference of RAMs and full VHDL 2008 support that dont seem to get fixed. But they will only do them if people request them.
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