Forum Discussion
Altera_Forum
Honored Contributor
11 years agojk flip flop usin dataflow model
How to design jk flip flop using dataflow model. When i run the code it shows an error "iteration limit reached". my vhdl code is library ieee; use ieee.std_logic_1164.all; -----...
Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- so to design jk flip flop I need to use behaviour modeling. so I cannot write code by using data flow model. --- Quote End --- A data flow model is a higher-level construct. A JK flip-flop is just an implementation detail.