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Honored Contributor
Honored Contributorjk flip flop usin dataflow model
How to design jk flip flop using dataflow model. When i run the code it shows an error "iteration limit reached". my vhdl code is library ieee; use ieee.std_logic_1164.all; -----...
Altera_ForumHonored Contributor
Honored ContributorYou hehe created a logic loop. Q depends on qbar, and q bar depends on q, so it gets in an infinite loop. Q and q bat styles not be linked.
Also, you should be using the clk signal as a clock, bout a logic signal.
