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Jack_Lin's avatar
Jack_Lin
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Jam STAPL Player Quartus v16, v17

We have code that programs .jbc file to the FPGA using a controller. Everything works fine when the .jbc is compiled with Quartus v16.1 But it fails when it's compiled with any newer Quartus vers...
  • JohnT_Altera's avatar
    JohnT_Altera
    5 years ago

    Hi,


    I would recommend you to manually generate the jbc file as this will let you have the option to enable the ISP programming mode.


JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


May I know how do you generate the jbc file? Have you tested the sof file to be working? May I know if the you are facing jbc programming failure or flash to fpga configuration failure?


Jack_Lin's avatar
Jack_Lin
Icon for New Contributor rankNew Contributor
5 years ago

Hi,

I am generating the .jbc file automatically when doing compile by going:

Assignments -> Device -> Device and Pin Options -> Programming Files -> Check the Jam STAPL Byte Code 2.0 File.

I am not able to try the .sof file, because with our design, the only way to program is to use .jbc file.

If you look at the 2 zip files that I attached, you can see the error message (v16 works and v20 doesn't work).