Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI agree with Tricky std_logic vectors should only be used when you indeed have a vector signal that represents something else than a number, or for interfacing with other components that require everything to be std_logic/std_logic_vectors. For the rest, use ranged integers for signal that never need to be converted to std_logic_vectors, and the signed/unsigned types for those that need to.