Forum Discussion
Occasional ContributorIs waitrequestAllowance suported for Altera EMIF external mem interface?
" waitrequest will usually only be ...". There is no usually in RTL. There is always. So waitrequest may be asserted DURING the burst. This means everything connected to waitrequest must be combinatorial, and can't be pipelined.
Thanks for the help. You may close this ticket.
Regular ContributorAlright, I understand on what you're trying to do.
But the waitrequestAllowance signal is the internal setting hardcoded in EMIF IP that shouldn't be touched by user.
Changing this signal might cause functionality failure in the EMIF IP.
Have you tried the burst operation?
If you want to optimize the controller performance, you can refer to EMIF User Guide for the device that you used.
FPGAOLOGI did not ask for touching internal settings of EMIF. I asked if EMIF supports waitrequestAllowance parameter for the user. And I found out looking into EMIF code that the answer is no. There is no such thing in the code but instead a ready signal is inverted to create the waitrequest signal.
I am already using burst operation. But there is no explanation for waitrequest will not be asserted during burst. Can you tell that When burst start, waitrequest will not be asserted until the end of the burst?
