--- Quote Start ---
if you 'pause' the clock, it means that you are going to implement a gated clock which is highly not recommended by most of the digital system design. add a "clock enable" signal in your design to determine when your design should run and when it should pause.
adding on, you might want to consider using "almost full" or "almost empty" port to control your design if you experience some data loss.
--- Quote End ---
Yes，I think using a "almost full" is necessary since "enable" in module usually does not pause the system soon, it has delay. And I need make all the modules in my design has enable, including my customized design module.
Honored Contributor
