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Since you have to use Qsys (Platform Designer) anyway to build a system with the HPS, why not just reuse the .qsys file in Project B? Doing this seems needlessly complicated.
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You're absolutely correct and I wish it were that simple for our case. The background story is that we have a FPGA build framework which relies upon the incremental complication and import/export of design partition of the Standard tools suite. Within this framework, the HPS is located in a submodule (partition) rather than in the top-level module. While we've been using the Standard tools (incr comp, import/export) in this manner for years, we've never had the need to include an HPS, until now.
I'm reading through the vast amount of Intel docs, but I have not been able to determine if HPS are supported in a partition. Are you aware of any restrictions or recommend a doc that might discuss this subject?
Honored Contributor
