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Altera_Forum
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11 years ago

I/O pins located in a block

Hello, I have a very simple problem : I would like to map some of the I/O pins of the FPGA, which are connected to a wide external bus (hsma_d[75..0]) on a commercial board, to an internal b...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I believe PietervanderStar is right. In some cases, I would create a design and allow the Quartus II Fitter to find the optimal placement for certain pins. Without having the pin defined at the top level, Fitter will ignore them or probably trigger error/warning that a pin should be connected.