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Altera_Forum's avatar
Altera_Forum
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13 years ago

Internally connect exported bus.

Hello. I want to split my qsys design into 2 parts: the A is Nios processor and some peripherials, and B is dsp. They both have to use sdram so the plan is to connect it in the top level system throu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Do you want to connect A and B outside of Qsys? Why don't you use hierarchy in QSys by designing two sub systems and connecting them together in a top level QSys design? Connecting them outside of QSys is very difficult and can lead to problems with memory mapping.

If you use two sub systems in a top level QSys project there shouldn't be any problem connecting pipeline bridges together.